1. Field of the Invention
The present invention relates to a sense amplifier for use in a semiconductor memory such as a static random access memory (SRAM).
2. Description of the Related Art
An SRAM memory cell outputs complementary data signals on a pair of data lines that have been precharged to equal potentials. The potentials on the data lines diverge slowly, because of limited driving capability of the transistors in the memory cell. It is known art to use a pair of complementary metal-oxide-semiconductor (MOS) inverters cross-coupled to the data lines as a sense amplifier to amplify the potential difference so that the data can be read quickly. This type of cross-coupled sense amplifier has the advantage of low power consumption, but the disadvantage of a comparatively slow amplification speed.
It is also known art to speed up the amplification process by having a pair of p-channel MOS transistors supply additional current to the inverters under control of the potentials on the data lines. In this scheme, however, the p-channel MOS transistors are initially switched off, and no additional current is supplied until the potential on one of the data lines falls far enough to switch on one of the p-channel MOS transistors. Amplification and data read-out are thus still delayed, adversely affecting the read access speed of the memory.